With the rapid development of semiconductor integration technology and the enhancement of electron-to-photon conversion efficiency, light-emitting diodes (LEDs) fabricated from nitrides of Group III materials have been widely used. In addition, with the diversification of applications and the increase of market demand, high-power, high-brightness LED chips are gaining more and more popularity.
Most of the existing high-power (HP) LED chips are still based on conventional large-die, low-voltage, direction-current (DC) LEDs and are grouped into horizontal and vertical structures. Compared with LED chips composed of small-die LEDs, a horizontal HP LED chip composed of large-die LEDs is usually required to operate at a relatively large current. This requires the device to have a good equilibrium between its P- and N-side electrodes, because any defective equilibrium will lead to significant current crowding, which can cause droop effect with the temperature rising around the electrodes, hence impinging the reliability and shortening the service life of the chip. On the other hand, it is a great challenge to homogenize distribution of the current density over the HP LED chip to mitigate the current crowding. Further, due to the geometric nature of the chip, the longer distance light travels in the chip, the more likely the light is to be absorbed. Therefore, a horizontal HP LED chip composed of large-die LEDs typically has lower light extraction efficiency than the one composed of small-die LEDs.
A vertical HP LED chip composed of large-die LEDs is advantageous over the horizontal HP LED chip composed of large-die LEDs in a more homogeneous current density distribution due to less horizontal current paths. In addition, as the vertical HP LED chip uses a conductive substrate instead of a sapphire substrate, it has further advantages including increased thermal conductivity, prevented current crowding, improved heat dissipation, and reduced temperature in the chip, which results in improved light extraction efficiency. Notwithstanding, given the fact that the sapphire substrate is indispensable in the process of growing an epitaxial layer for the LED chip due to its excellent intrinsic capacity to facilitate the growth of LED material, in practical fabrication of the vertical device, the sapphire substrate is still used and is removed after the conductive substrate is bonded to the epitaxial layer. This complicates the manufacture, leads to a lower yield than that of the horizontal device, and raises the cost.
High-voltage (HV) LED chips, adopted as a solution for the HP LED chips, fabricated using semiconductor integration processes can achieve a higher light extraction efficiency than conventional low-voltage LED chips. A typical HV LED chip is made by dividing a large LED die into a number of micro cells, and connecting them in series. This design allows the device to be driven by a relative low current with well-distributed density. Additionally, the design shortens a light transmission path in the material of the chip to reduce the amount of loss of light due to absorption, thereby resulting in improved light extraction efficiency. Moreover, the design further allows the customization of the number and size of the micro cells to meet the requirements of different input voltages while maintaining the same reliable photoelectric properties as a HP LED chip. A HV LED chip differs in process from a massively-produced, low-voltage HP LED chip primarily in having a number of trenches formed by etching. As these trenches are intended to isolate the micro cells from one another, they are generally deep enough to reach the insulated underlying sapphire substrate. The depth of the trenches is typically 5˜8 μm, varying with the geometry of the epitaxial layer.
There have been many processes proposed to fabricate such a HV LED chip, one of which is by growing an epitaxial layer on an aluminum nitride (AlN) or silicon carbide (SiC) substrate which possesses a high thermal conductivity, forming deep trenches down into a semi-insulating buffer layer or directly into the semi-insulating substrate by photolithography and etching such that a plurality of micro cells isolated from one another are formed between the trenches, forming electrodes and interconnecting them with conductive wires. While the HV LED chip made by this method has good heat dissipation performance, unreliable interconnection of the conductive wires remains a problem. Any loose or broken solder joint will lead to failure of the whole HV LED chip. Another known process to fabricate a HV LED chip is to form deep trenches with perpendicular sidewalls by inductively coupled plasma (ICP) etching and fill the trenches with an insulating polymeric material to the same level as a p-type gallium nitride (GaN) layer, or directly form deep trenches with tapered sidewalls by manipulating parameters of the ICP etching. Still another known process to fabricate a HV LED chip is to form deep trenches with tapered sidewalls by etching and deposit a considerable thickness of insulating dielectric therein to achieve isolation.
It can be concluded from the aforementioned processes that the formation of the deep trenches between the micro cells of the HV LED chip involves deposition of a hard mask and performance of an ICP etching process, which leads to great process complexity, and in particular, the multiple ICP etching processes inevitably introduce impairment to the epitaxial layer, thus adversely affecting the process cost and yield. In addition, while there is generally no specific requirement imposed on the width of the deep trenches, considering the obvious fact that too larger trench width will lead to a smaller effective emitting area and hence lower performance of the LED chip, it is desirable for these processes to have a capability of forming the deep trenches with a large ratio of depth to width. However, the trench width is hard to be reduced. Furthermore, in order to ensure sufficient continuity and compactness of insulating, isolating dielectric layers and interconnecting contact layers within the deep trenches, the sidewalls of the trenches etched by the ICP process is required to have a suitable slope, which is indeed a challenging task. Therefore, the formation of the HV LED chip in each of the above processes involves repeated deposition of a hard mask and performance of an ICP etching process, as well as other suitable process, in order to ensure sufficient insulation between the micro cells and suitable continuity and compactness of the interconnecting contact layers.
There are great difficulties in addressing these problems, and therefore needs a novel process of forming a HV LED chip, which is capable of automatic formation of deep trenches between micro cells of a HV LED chip to reduce the cost of forming the deep trenches of the HV LED chip and ensure sufficient continuity and compactness of insulating, isolating dielectric layers and interconnecting contact layers within the deep trenches.